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80608hkim b8-8317 / 92299th(ot) no.6235-1/15 specifications of any and all sanyo semiconductor co.,l td. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer ' s products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer ' sproductsor equipment. any and all sanyo semiconductor co.,ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, av equipment, communication device, office equipment, industrial equ ipment etc.). the products mentioned herein shall not be intended for use for any "special application" (medica l equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, t ransportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of re liability and can directly threaten human lives in case of failure or malfunction of the product or may cause har m to human bodies, nor shall they grant any guarantee thereof. if you should intend to use our products for app lications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. if there is n o consultation or inquiry before the intended use, our customer shall be solely responsible for the use. lc75844m overview the lc75844m is a 1/4 duty general-purpose lcd driver that can be used for frequency display in electronic tuners under the control of a microcontroller. the lc75844m can drive an lcd with up to 88 segments directly. the lc75844m can also control up to 4 general-purpose output ports. since the lc75844m uses separate power supply systems for the lcd drive block and the logic block, the lcd driver block power-supply voltage can be set to any voltage in the range 2.7 to 6.0 volts, regardless of the logic block power-supply voltage. application ? car, home frequency display features ? support for 1/4 duty 1/2 bias or 1/4 duty 1/3 bias drive of up to 88 segments under serial data control. ? serial data input supports ccb format communication with the system controller. ? serial data control of the power-saving mode based backup function and all the segments forced off function ? serial data control of switching between the segment output port and the general-purpose output port functions ? high generality, since display data is displayed directly without decoder intervention. ? independent v lcd for the lcd driver block (v lcd can be set to any voltage in the range 2.7 to 6.0 volts, regardless of the logic block power-supply voltage.) ? the inh pin can force the display to the off state. ? rc oscillator circuit ordering number : EN6235A cmos ic 1/4-duty general-purpose lcd display driver ? ccb is a trademark of sanyo electric co., ltd. ? ccb is sanyo's original bus format and all the bus addresses are controlled by sanyo.
lc75844m no.6235-2/15 specifications absolute maximum ratings at ta = 25 c, v ss = 0v parameter symbol conditions ratings unit v dd max v dd -0.3 to +7.0 maximum supply voltage v lcd max v lcd -0.3 to +7.0 v v in 1 ce, cl, di, inh -0.3 to +7.0 v in 2 osc -0.3 to v dd +0.3 input voltage v in 3 v lcd 1, v lcd 2 -0.3 to v lcd +0.3 v v out 1 osc -0.3 to v dd +0.3 output voltage v out 2 s1 to s22, com1 to com4, p1 to p4 -0.3 to v lcd +0.3 v i out 1 s1 to s22 300 a i out 2 com1 to com4 3 output current i out 3 p1 to p4 5 ma allowable power dissipation pd max ta = 85 c 100 mw operating temperature topr -40 to +85 c storage temperature tstg -55 to +125 c allowable operating ranges at ta = -40 to +85 c, v ss = 0v ratings parameter symbol conditions min typ max unit v dd v dd 2.7 6.0 supply voltage v lcd v lcd 2.7 6.0 v v lcd 1 v lcd 1 2/3v lcd v lcd input voltage v lcd 2 v lcd 2 1/3v lcd v lcd v input high-level voltage v ih ce, cl, di, inh 0.8v dd 6.0 v input low-level voltage v il ce, cl, di, inh 0 0.2v dd v recommended external resistor rosc osc 43 k recommended external capacitor cosc osc 680 pf oscillation guaranteed range fosc osc 25 50 100 khz data setup time tds cl, di [figure 2] 160 ns data hold time tdh cl, di [figure 2] 160 ns ce wait time tcp ce, cl [figure 2] 160 ns ce setup time tcs ce, cl [figure 2] 160 ns ce hold time tch ce, cl [figure 2] 160 ns high-level clock pulse width t h cl [figure 2] 160 ns low-level clock pulse width t l cl [figure 2] 160 ns rise time tr ce, cl, di [figure 2] 160 ns fall time tf ce, cl, di [figure 2] 160 ns inh switching time tc inh , ce [figure 3] 10 s
lc75844m no.6235-3/15 electrical characteristics at allowable operating ranges ratings parameter symbol pin conditions min typ max unit hysteresis width v h ce, cl, di, inh 0.1v dd v input high-level current i ih ce, cl, di, inh v i = 6.0v 5.0 a input low-level current i il ce, cl, di, inh v i = 0v -5.0 a v oh 1 s1 to s22 i o = -20 a v lcd -0.9 v oh 2 com1 to com4 i o = -100 a v lcd -0.9 output high-level voltage v oh 3 p1 to p4 i o = -1ma v lcd -0.9 v v ol 1 s1 to s22 i o = 20 a 0.9 v ol 2 com1 to com4 i o = 100 a 0.9 output low-level voltage v ol 3 p1 to p4 i o = 1ma 0.9 v v mid 1 com1 to com4 1/2 bias, i o = 100 a 1/2v lcd -0.9 1/2v lcd +0.9 v mid 2 s1 to s22 1/3 bias, i o = 20 a 2/3v lcd -0.9 2/3v lcd +0.9 v mid 3 s1 to s22 1/3 bias, i o = 20 a 1/3v lcd -0.9 1/3v lcd +0.9 v mid 4 com1 to com4 1/3 bias, i o = 100 a 2/3v lcd -0.9 2/3v lcd +0.9 output middle-level voltage * 1 v mid 5 com1 to com4 1/3 bias, i o = 100 a 1/3v lcd -0.9 1/3v lcd +0.9 v oscillator frequency f osc osc rosc = 43k cosc = 680pf 40 50 60 khz i dd 1 v dd power saving mode 5 i dd 2 v dd v dd = 6.0v, output open, fosc = 50khz 230 460 i lcd 1 v lcd power saving mode 5 i lcd 2 v lcd v lcd = 6.0v, output open, 1/2 bias, fosc = 50khz 100 200 supply current i lcd 3 v lcd v lcd = 6.0v, output open, 1/3 bias, fosc = 50khz 60 120 a note: *1 excluding the bias voltage generation divider resistors built into v lcd 1, v lcd 2. (see figure 1.) except these resistors v ss v lcd 2 v lcd 1 v lcd to the common segment driver figure 1
lc75844m no.6235-4/15 1. when cl is stopped at the low level 2. when cl is stopped at the high level figure 2 package dimensions unit : mm (typ) 3263 tds tch tcs tcp tdh tr tf t l t h ce cl di v il v ih 50% v il v ih v ih v il v il v il v ih v ih 50% tds v il v ih tch tcs tcp tdh tr tf t h t l ce cl di sanyo : mfp36sdj(375mil) 1 18 36 19 0.8 15.2 0.3 0.65 10.5 7.9 0.25 (0.8) 2.45max 0.1 (2.25)
lc75844m no.6235-5/15 pin assignment block diagram lc75844m top view 6 5 4 3 2 11 10 9 8 7 1 18 17 16 15 14 13 12 31 32 33 34 35 26 27 28 29 30 36 19 20 21 22 23 24 25 s8 s7 s6 s5 p4/s4 p2/s2 p3/s3 p1/s1 s13 s12 s11 s10 s9 ce cl di s18 s17 s16 s15 s14 v ss osc inh vlcd v lcd 1 v lcd 2 com3 com4 v dd s22 com1 com2 s19 s20 s21 v lcd 1 s1/p1 s2/p2 s4/p4 s3/p3 s5 s21 ce cl di s22 com1 com2 com3 com4 v ss v lcd 2 v lcd v dd inh osc shift register segment driver & latch address detector clock generator common driver
lc75844m no.6235-6/15 pin functions symbol pin no. function active i/o handling when unused s1/p1 to s4/p4 s5 to s22 1 to 4 5 to 22 segment outputs for displaying the display data transferred by serial data input. the s1/p1 to s4/p4 pins can be used as general-purpose output ports under serial data control. - o open com1 to com4 23 to 26 common driver outputs the frame frequency (fo) is given by: fo=(fosc/512) hz. - o open osc 32 oscillator pin, which, together with externally connected resistor and capacitor, makes up an oscillator circuit. - i/o v dd ce cl di 34 35 36 serial data transfer input pin to be connected to the controller. ce: chip enable cl: synchronization clock di: transfer data h - i i i gnd inh 33 display off input pin ? inh =?l? (v ss ) ... off s1/p1 to s4/p4=?l? (v ss ) (fixed to ?l? after forced selection of segment output port.) s5 to s22=?l? (v ss ) com1 to com4=?l? (v ss ) ? inh =?h? (v dd ) ... on note that the serial data can be transferred when off. l i gnd v lcd 1 29 used for applying the lcd driver 2/3 bias voltage externally. must be connected to v lcd 2 when a 1/2 bias scheme is used. - i open v lcd 2 30 used for applying the lcd driver 1/3 bias voltage externally. must be connected to v lcd 1 when a 1/2 bias scheme is used. - i open v dd 27 logic block power supply pin to provide a voltage between 2.7v to 6.0v. - - - v lcd 28 lcd driver power supply pin to provide a voltage between 2.7v to 6.0v. - - - v ss 31 power supply pin to connect to ground. - - -
lc75844m no.6235-7/15 serial data transfer form (1) when cl is stopped at the low level note) dd direction data (2) when cl is stopped at the low level note) dd direction data ? ccb address ?44h? ? d1 to d88 display data ? p0 to p2 segment out put port / general-purpose output port switching control data ? dr 1/2 bias driver / 1/3 bias driver switching control data ? sc segment on, off control data ? bu normal mode, power save mode control data a3 a2 a1 a0 b3 b2 b1 b0 d1 d2 d3 0 bu sc dr p2 p1 p0 0 0 0 0 0 0 1 0 0 0 1 0 0 d44 d43 d42 d41 d40 d39 d38 d37 dd 1-bits di cl ce ccb address 8-bits display data 44-bits control data 11-bit a3 a2 a1 a0 b3 b2 b1 b0 d88 d87 d86 d85 d84 d83 d82 d81 d45 d46 d47 0 1 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 fixed data 11-bit dd 1-bits ccb address 8-bits display data 44-bits a3 a2 a1 a0 b3 b2 b1 b0 d3 d2 d1 0 1 0 0 0 1 0 0 0 bu sc dr p2 p1 p0 0 0 0 0 0 d44 d43 d42 d41 d40 d39 d38 d37 di cl ce a3 a2 a1 a0 b3 b2 b1 b0 d82 d81 d47 d46 d45 0 1 0 0 0 1 0 0 0 0 0 d84 d83 d86 d85 d88 d87 0 0 00 0 0 1 0 0 dd 1-bits ccb address 8-bits display data 44-bits control data 11-bit fixed data 11-bit dd 1-bits ccb address 8-bits display data 44-bits
lc75844m no.6235-8/15 example of serial data transfer ? when used with 45 segments or more serial data must be transferred all 112-bit. ? when fewer than 45 segments are used, only 56-bits of serial data need to be sent. however, the display data d1 to d44 and the control data must be sent. note) when fewer than 45 segments are used, transfers su ch as that shown in the figure below cannot be used. control data description (1) p0 to p2 segment output port/general-purpose output port switching control data this control data switching output s1/p1 to s4/p4 segment output port and general-purpose output port. control data output pin state p0 p1 p2 s1/p1 s2/p2 s3/p3 s4/p4 0 0 0 s1 s2 s3 s4 0 0 1 p1 s2 s3 s4 0 1 0 p1 p2 s3 s4 0 1 1 p1 p2 p3 s4 1 0 0 p1 p2 p3 p4 the following shows the correspondence between output pins and display data when the general-purpose output port is selected. output pin correspondence display data s1/p1 d1 s2/p2 d5 s3/p3 d9 s4/p4 d13 for example, if output pin s4/p4 is for the general-purpose output port, output pin s4/p4 outputs high and low-level when display data d13=?1? and d13= ?0?, respectively. (2) dr 1/2 bias drive, 1/3 bias driver switching control data this control data switching lcd 1/2 bias driver and 1/3 bias driver. dr driver method 0 1/3 bias driver 1 1/2 bias driver note) sn (n=1 to 4): segment output port pn (n=1 to 4): general-purpose output port 1 1 0 0 0 0 0 0 56-bit 8-bit a3 a2 a1 a0 b3 b2 b1 b0 d3 d2 d1 0 d44 d43 d42 d41 d40 d39 d38 d37 1 1 0 0 0 0 0 0 a3 a2 a1 a0 b3 b2 b1 b0 p1 0 bu sc dr p2 p0 0 0 0 0 0 d88 d87 d86 d85 d84 d83 d82 d47 d46 d45 d81 0 1 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 56-bit 8-bit a3 a2 a1 a0 b3 b2 b1 b0 d3 d2 d1 0 d44 d43 d42 d41 d40 d39 d38 d37 p1 0 bu sc dr p2 p0 0 0 0 0 1 1 0 0 0 0 0 0 56-bit 8-bit a3 a2 a1 a0 b3 b2 b1 b0 0 d88 d87 d86 d85 d84 d83 d82 d81 d47 d46 d45 0 1 0 0 0 0 0 0 0 0 0
lc75844m no.6235-9/15 (3) sc segment on, off control data this control data controls segment on and off. sc display state 0 on 1 off note: that the off state with sc=[1] corresponds to the off state due to output of the display off waveform from the segment output pin. (4) bu normal mode, power save mode control data this control data controls normal mode and power save mode. bu mode 0 normal mode 1 power save mode (oscillation on the osc pin stops and the comm on, segment output pins go low, however, output pins s1/p1 to s4/p4 can be used as the general-purpose ou tput port by the use of control data p0 to p2.) display data and output pin correspondence output pin com1 com2 com3 com4 output pin com1 com2 com3 com4 s1/p1 d1 d2 d3 d4 s12 d45 d46 d47 d48 s2/p2 d5 d6 d7 d8 s13 d49 d50 d51 d52 s3/p3 d9 d10 d11 d12 s14 d53 d54 d55 d56 s4/p4 d13 d14 d15 d16 s15 d57 d58 d59 d60 s5 d17 d18 d19 d20 s16 d61 d62 d63 d64 s6 d21 d22 d23 d24 s17 d65 d66 d67 d68 s7 d25 d26 d27 d28 s18 d69 d70 d71 d72 s8 d29 d30 d31 d32 s19 d73 d74 d75 d76 s9 d33 d34 d35 d36 s20 d77 d78 d79 d80 s10 d37 d38 d39 d40 s21 d81 d82 d83 d84 s11 d41 d42 d43 d44 s22 d85 d86 d87 d88 note: output pins s1/p1 to s4/p4 are for segment output port selection. for example, the data to output pin correspondence for the output pin s11 is as follows. display data d41 d42 d43 d44 output pin (s11) state 0 0 0 0 lcd segments for com1, com2, com3 and com4 off 0 0 0 1 lcd segment for com4 on 0 0 1 0 lcd segment for com3 on 0 0 1 1 lcd segments for com3 and com4 on 0 1 0 0 lcd segment for com2 on 0 1 0 1 lcd segments for com2 and com4 on 0 1 1 0 lcd segments for com2 and com3 on 0 1 1 1 lcd segments for com2, com3 and 4 on 1 0 0 0 lcd segment for com1 on 1 0 0 1 lcd segments for com1 and com4 on 1 0 1 0 lcd segments for com1 and com3 on 1 0 1 1 lcd segments for com1, 3 and com4 on 1 1 0 0 lcd segments for com1 and com2 on 1 1 0 1 lcd segments for com1, com2 and com4 on 1 1 1 0 lcd segments for com1, com2 and com3 on 1 1 1 1 lcd segments for com1, com2, com3 and com4 on
lc75844m no.6235-10/15 output waveforms (1/4-d uty 1/2-bias on system) v lcd 1, v lcd 2 v lcd com3 com2 com1 com4 lcd driver output when lcd segments for com1, com2, com3 and com4 are on. lcd driver output when lcd segments for com2 and com4 are on. lcd driver output when only lcd segment for com4 is on. lcd driver output when lcd segments for com1, com2 and com3 are on. lcd driver output when lcd segments for com2 and com3 are on. lcd driver output when lcd segments for com1 and com3 are on. lcd driver output when only lcd segment for com3 is on. lcd driver output when lcd segments for com1 and com2 are on. lcd driver output when only lcd segment for com2 is on. lcd driver output when only lcd segment for com1 is on. lcd driver output when lcd segments for com1, com2, com3 and com4 are off. 0v 1/4 duty, 1/2 bias waveform fosc 512 [hz] v lcd 1, v lcd 2 v lcd 0v v lcd 1, v lcd 2 v lcd 0v v lcd 1, v lcd 2 v lcd 0v v lcd 1, v lcd 2 v lcd 0v v lcd 1, v lcd 2 v lcd 0v v lcd 1, v lcd 2 v lcd 0v v lcd 1, v lcd 2 v lcd 0v v lcd 1, v lcd 2 v lcd 0v v lcd 1, v lcd 2 v lcd 0v v lcd 1, v lcd 2 v lcd 0v v lcd 1, v lcd 2 v lcd 0v v lcd 1, v lcd 2 v lcd 0v v lcd 1, v lcd 2 v lcd 0v v lcd 1, v lcd 2 v lcd 0v
lc75844m no.6235-11/15 output waveforms (1/4-d uty 1/3-bias on system) v lcd 1 v lcd 2 fosc 512 [hz] v lcd 0v 1/4 duty, 1/3 bias waveform com3 com2 com1 com4 lcd driver output when lcd segments for com1, com2, com3 and com4 are on. lcd driver output when lcd segments for com2 and com4 are on. lcd driver output when only lcd segment for com4 is on. lcd driver output when lcd segments for com1, com2 and com3 are on. lcd driver output when lcd segments for com2 and com3 are on. lcd driver output when lcd segments for com1 and com3 are on. lcd driver output when only lcd segment for com3 is on. lcd driver output when lcd segments for com1 and com2 are on. lcd driver output when only lcd segment for com2 is on. lcd driver output when only lcd segment for com1 is on. lcd driver output when lcd segments for com1, com2, com3 and com4 are off. v lcd 1 v lcd 2 v lcd 0v v lcd 1 v lcd 2 v lcd 0v v lcd 1 v lcd 2 v lcd 0v v lcd 1 v lcd 2 v lcd 0v v lcd 1 v lcd 2 v lcd 0v v lcd 1 v lcd 2 v lcd 0v v lcd 1 v lcd 2 v lcd 0v v lcd 1 v lcd 2 v lcd 0v v lcd 1 v lcd 2 v lcd 0v v lcd 1 v lcd 2 v lcd 0v v lcd 1 v lcd 2 v lcd 0v v lcd 1 v lcd 2 v lcd 0v v lcd 1 v lcd 2 v lcd 0v v lcd 1 v lcd 2 v lcd 0v v lcd 1 v lcd 2 v lcd 0v v lcd 1 v lcd 2 v lcd 0v v lcd 1 v lcd 2 v lcd 0v v lcd 1 v lcd 2 v lcd 0v v lcd 1 v lcd 2 v lcd 0v v lcd 1 v lcd 2 v lcd 0v v lcd 1 v lcd 2 v lcd 0v v lcd 1 v lcd 2 v lcd 0v v lcd 1 v lcd 2 v lcd 0v v lcd 1 v lcd 2 v lcd 0v v lcd 1 v lcd 2 v lcd 0v v lcd 1 v lcd 2 v lcd 0v v lcd 1 v lcd 2 v lcd 0v v lcd 1 v lcd 2 v lcd 0v v lcd 1 v lcd 2 v lcd 0v
lc75844m no.6235-12/15 inh and display control since the ic internal data (d1 to d88, control data) is undefined immediately after applying power, hold inh low at same time as applying power to turn off the displa y (s1/p1 to s4/p4, s5 to s22, com1 to com4 v ss level), and serial transfer data from the micropr ocessor during the period that inh is low. when the data transfer is complete, set inh high. this procedure will avoid displaying meaningl ess patterns at startup. (see figure 3) power sequence be sure to observe the following sequence for power on/off (see figure 3) ? power on: logic block power (v dd ) on lcd driver power (v lcd ) on ? power off: lcd driver power (v lcd ) off logic block power (v dd ) off when the logic block power (v dd ) and lcd driver power (v lcd ) are common, both power supplies can be turned on/off simultaneously. note on controller-used display data transfer since the lc75844m is such that display data (d1 to d88) is transferred in 4 times, it is recommended to transfer display data within 30 [ms] in terms of display quality. v dd v lcd t2 t1 t3 tc indefinite decision note: ? t1 0 ? t2 > 0 ? t3 0 (t2 > t3) ? tc 10 s min v il v il ce d1 to d44 p0 to p2 dr, sc, bu internal data internal data (d45 to d88) indefinite figure 3 inh indefinite decision indefinite display data, control data transfer
lc75844m no.6235-13/15 sample application circuit 1 1/2 bias (for normal panel) *2 if a capacitor other than the external capacitor cosc=680 [pf] recommended is to be used, it is recommended to used a capacitor of 220 to 2200 [pf]. sample application circuit 2 1/2 bias (for large panel) *2 if a capacitor other than the external capacitor cosc=680 [pf] recommended is to be used, it is recommended to used a capacitor of 220 to 2200 [pf]. used for control of back-light (general-purpose output port) from controller lcd panel (max.88 segment) c (p3) (p4) (p2) (p1) com1 com3 com2 com4 p1/s1 p2/s2 p3/s3 p4/s4 s5 s20 s21 s22 osc c 0.047 f +5v *2 +3v v dd v ss v lcd v lcd 1 v lcd 2 inh ce cl di c (p3) (p4) (p2) (p1) com1 com3 com2 com4 p1/s1 p2/s2 p3/s3 p4/s4 s5 s20 s21 s22 osc number 10k r number k c 0.047 f +5v *2 +3v v dd v ss v lcd v lcd 1 v lcd 2 inh ce cl di r r used for control of back-light (general-purpose output port) from controller lcd panel (max.88 segment)
lc75844m no.6235-14/15 sample application circuit 3 1/3 bias (for normal panel) *2 if a capacitor other than the external capacitor cosc=680 [pf] recommended is to be used, it is recommended to used a capacitor of 220 to 2200 [pf]. sample application circuit 4 1/3 bias (for large panel) *2 if a capacitor other than the external capacitor cosc=680 [pf] recommended is to be used, it is recommended to used a capacitor of 220 to 2200 [pf]. c (p3) (p4) (p2) (p1) com1 com3 com2 com4 p1/s1 p2/s2 p3/s3 p4/s4 s5 s20 s21 s22 osc +5v *2 +3v v dd v ss v lcd v lcd 1 v lcd 2 inh ce cl di c used for control of back-light (general-purpose output port) from controller lcd panel (max.88 segment) c 0.047 f c (p3) (p4) (p2) (p1) com1 com3 com2 com4 p1/s1 p2/s2 p3/s3 p4/s4 s5 s20 s21 s22 osc +5v *2 +3v v dd v ss v lcd v lcd 1 v lcd 2 inh ce cl di r r r c number 10k r number k c 0.047 f used for control of back-light (general-purpose output port) from controller lcd panel (max.88 segment)
lc75844m no.6235-15/15 ps this catalog provides information as of august, 2008. specifications and information herein are subject to change without notice. sanyo semiconductor co.,ltd. assumes no responsibil ity for equipment failures that result from using products at values that exceed, even momentarily, rated v alues (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all sanyo semiconductor co.,ltd. products described or contained herein. sanyo semiconductor co.,ltd. strives to supply high-qua lity high-reliability products, however, any and all semiconductor products fail or malfunction with some probab ility. it is possible that these probabilistic failures or malfunction could give rise to accident s or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. when designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of sanyo semiconductor co.,ltd. or any third party. sanyo semiconductor co.,ltd. shall not be liable for any claim or suits with regard to a third party's intellectual property rights which has resulted from the us e of the technical information and products mentioned above. information (including circuit diagrams and circuit par ameters) herein is for example only; it is not guaranteed for volume production. any and all information described or contained he rein are subject to change without notice due to product/technology improvement, etc. when designing equip ment, refer to the "delivery specification" for the sanyo semiconductor co.,ltd. product that you intend to use. in the event that any or all sanyo semiconductor co.,ltd. products described or contained herein are controlled under any of applicable local export control l aws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of sanyo semiconductor co.,ltd.

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